The SAP (Simple As Possible) is an 8-bit CPU design built from first principles.
Originally described in Digital Computer Electronics by Albert Paul Malvino in 1977, and more recently implemented as a breadboard build by Ben Eater over his YouTube series here.
"SAP-1" covers my reproduction of Ben Eater's design, which actually includes both SAP-1 and SAP-2 features. (There is also a SAP-3 design)
"NSAP-2" covers my own design, aptly differentiated as the NOT Simple as Possible CPU.
Instead of following the Intel ISA of the SAP line, I've chosen to take a more "Frankenstein" approach, combining design elements from the Intel 8000, 6502, and Z80 processors.