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      • SAP-1
        • Gallery
        • Combinational Logic
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My TCL Microcode generator has two files for definitions and one library of code.

  • pinDefinitions.tcl

# Chip Bytes AddrLines

# 28c16 2048 11

# 28c64 8182 13

# 28c256 32768 15

#

# Assign labels to address line(s) high-to-low bit order

#

set _ROM(size) 2048

set _ROM(lines) 11

set _ROM(chips) 3

set AddrLines(chipsel) {8 7}

set AddrLines(opcode) {6 5 4 3}

set AddrLines(steps) {2 1 0}

# Unused {10 9}


# Assign control labels to each chips data lines

# Note: The high 2 bits do not have inverters.

#

set ControlLine(0:10000000) "IO" ;# ! Instruction register Out

set ControlLine(0:01000000) "CO" ;# ! Counter Out

set ControlLine(0:00100000) "MI" ;# ! Memory address In

set ControlLine(0:00010000) "RI" ;# RAM In

set ControlLine(0:00001000) "HLT" ;# Halt

set ControlLine(0:00000100) "II" ;# ! Instruction register In

set ControlLine(0:00000010) "RO" ;# ! RAM Out

set ControlLine(0:00000001) "J" ;# ! Jump


set ControlLine(1:10000000) "AI" ;# ! A Reg In

set ControlLine(1:01000000) "EO" ;# ! ALU Sum Out

set ControlLine(1:00100000) "BI" ;# ! B Reg In

set ControlLine(1:00010000) "OI" ;# Output register In

set ControlLine(1:00001000) "FI" ;# ! Flags In

set ControlLine(1:00000100) "CE" ;# Counter Enable (incr)

set ControlLine(1:00000010) "SU" ;# ALU Subtract mode

set ControlLine(1:00000001) "AO" ;# ! A Reg Out


set ControlLine(2:10000000) "" ;#

set ControlLine(2:01000000) "" ;#

set ControlLine(2:00100000) "" ;#

set ControlLine(2:00010000) "" ;#

set ControlLine(2:00001000) "" ;#

set ControlLine(2:00000100) "" ;#

set ControlLine(2:00000010) "JC" ;# Jump on Carry

set ControlLine(2:00000001) "JZ" ;# Jump on Zero


set ControlLine(3:10000000) "" ;#

set ControlLine(3:01000000) "" ;#

set ControlLine(3:00100000) "" ;#

set ControlLine(3:00010000) "" ;#

set ControlLine(3:00001000) "" ;#

set ControlLine(3:00000100) "" ;#

set ControlLine(3:00000010) "" ;#

set ControlLine(3:00000001) "" ;#

Here we define the size and number of EEPROMs


Assign sub-step bits, instruction register bits, and the chip select to the input/address pins.

Note I no longer use the address/input pins for the conditional jump flags!






Assign labels to the output/data pins to their control line function.

  • microcode.tcl

This is both where the op-codes are defined, and the main code file.

It loads the library and pin definitions, initializes a block of memory, and each op-code is defined with a command specifying which control signals are active during each sub-step."romOp4" takes two arguments, the decimal op-code value, and a list of list-pairs.

The list-pairs are the sub-step number (1-8) and a list of control labels as specified in 'pinDefinitions'

The line above each romOp4 command lists the binary op-code value and a mnemonic for reference.

I've left all 8 sub-step 'slots' in place for future expansion, since this is already provided for by the 3-bit sub-step counter.

The last three op-codes are "non-standard", but only use the existing control signals and SAP hardware. It's just this simple to add new instructions.

Finally it writes a binary file to program into the EEPROM chips.

# # Initialization

#

source libBinary.tcl

source pinDefinitions.tcl

romInit


# Insert 4-bit opcode steps

# 4-bit instructions use the high 4 bits for the opcode, and low 4 bits for an address parameter.

#

# 0000 NOP

romOp4 0 { 1 {MI CO} 2 {RO II CE} 3 {} 4 {} 5 {} 6 {} 7 {} 8 {} }

# 0001 LDA

romOp4 1 { 1 {MI CO} 2 {RO II CE} 3 {IO MI} 4 {RO AI} 5 {} 6 {} 7 {} 8 {} }

# 0010 ADD

romOp4 2 { 1 {MI CO} 2 {RO II CE} 3 {IO MI} 4 {RO BI} 5 {EO AI FI} 6 {} 7 {} 8 {} }

# 0011 SUB

romOp4 3 { 1 {MI CO} 2 {RO II CE} 3 {IO MI} 4 {RO BI} 5 {EO AI FI SU} 6 {} 7 {} 8 {} }

# 0100 STA

romOp4 4 { 1 {MI CO} 2 {RO II CE} 3 {IO MI} 4 {AO RI} 5 {} 6 {} 7 {} 8 {} }

# 0101 LDI

romOp4 5 { 1 {MI CO} 2 {RO II CE} 3 {IO AI} 4 {} 5 {} 6 {} 7 {} 8 {} }

# 0110 JMP

romOp4 6 { 1 {MI CO} 2 {RO II CE} 3 {IO J} 4 {} 5 {} 6 {} 7 {} 8 {} }

# 0111 JC

romOp4 7 { 1 {MI CO} 2 {RO II CE} 3 {IO JC} 4 {} 5 {} 6 {} 7 {} 8 {} }

# 1000 JZ

romOp4 8 { 1 {MI CO} 2 {RO II CE} 3 {IO JZ} 4 {} 5 {} 6 {} 7 {} 8 {} }

# 1110 OUT

romOp4 14 { 1 {MI CO} 2 {RO II CE} 3 {AO OI} 4 {} 5 {} 6 {} 7 {} 8 {} }

# 1111 HLT

romOp4 15 { 1 {MI CO} 2 {RO II CE} 3 {HLT} 4 {} 5 {} 6 {} 7 {} 8 {} }


# Non-eater op-codes

#

# 1001 OUTM - Outputs the value at a specified memory address

romOp4 9 { 1 {MI CO} 2 {RO II CE} 3 {IO MI} 4 {RO OI} 5 {} 6 {} 7 {} 8 {} }


# 1010 INC - Add a specified 4-bit number directly to the A register

romOp4 10 { 1 {MI CO} 2 {RO II CE} 3 {IO BI} 4 {EO AI FI} 5 {} 6 {} 7 {} 8 {} }


# 1011 DEC - Subtract a specified 4-bit number directly to the A register

romOp4 11 { 1 {MI CO} 2 {RO II CE} 3 {IO BI} 4 {EO AI FI SU} 5 {} 6 {} 7 {} 8 {} }



# # Save the combined ROM image

#

romWriteBinary "./uc12.bin"

exit 0


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